270 replies to this topic

[Bunkei]

I think on my next podcast, I'd like to do a Wii U "myths debunked" episode starring routerbad/3Dude/Socalmuscle etc.  Even though I don't understand the technical jargon, but I can at least follow what you guys are saying.

 

Good idea, no?

[Plutonas]

routerbad, on 02 Apr 2013 - 09:09, said:I'm getting 61.6 GB/s, I think that would be overall for all four chips, I'm still assuming that they are all talking with one northbridge and memory controller, the bus clock multi is doubled.

Ill be happy just with killing 12.8

Oh,

from the gpu die.



ddr3 io is the backwards L the chipworks word is on.

The whole shabangabang goes into the gpu along that corner

 

I counted 155

 

Horizontal 79

vertical 76

Edited by Plutonas, 03 April 2013 - 08:49 PM.

[routerbad]

I counted 155

 

Horizontal 79

vertical 76

There are 79 there, 3 of them are darker than the rest, I counted the leads rather than the pins themselves because they're easy to miss.

[Plutonas]

i have a huge image file of it, 9mbsize,  I can zoom in and make 1 pin a huge image... so I counted them very easy...

Edited by Plutonas, 04 April 2013 - 01:44 AM.

[3Dude]

Plutonas, on 03 Apr 2013 - 19:56, said:i have a huge image file of it, 9mbsize,  I can zoom in and make 1 pin a huge image... so I counted them very easy...


Probably a miscount, its unlikely for the number of pins to not be symmetrical, as they have the sam e number of lanes coming from the same number of ram chips coming from either side.

[routerbad]

i have a huge image file of it, 9mbsize,  I can zoom in and make 1 pin a huge image... so I counted them very easy...

An odd overall number of pins for two DDR3 channels would be very... ahem, odd.

[3Dude]

lmao, neogaf is still tripping all over themselves over the bandwidth. XD

Trying to explain how the edram is the reason, because its3x bigger than 360 and has higher internal bandwidth....

But... You have to fill it from main...

So you fill 3x the edram from main at half the speed, which would take 6x longer.... But its magically faster?

Oh neogaf.

Edited by 3Dude, 04 April 2013 - 08:27 AM.

[Goodtwin]

It is hard to peice this information together though.  To say the ram chips are 16 bit isnt wrong, its just that there are 8 banks of 256MBx16bit ram inside each module.  So if the controller could only access one bank at a time, then yes it would be limited to 16bit, but since there are 8 chips, its theoretically eight times that that amount assuming each bank runs on its own channel.  Its also near impossibe to get real info from memory manufactures.  I dont care that NDA's are in place, its sad that sites like IGN dont have any contacts who are willing to divulge information anonymously.  Even if they dont actually know what the bandwidth is, they would at least know if it was better or worse than the 360.  If anything, game developers would have a better understanding of what the real world bandwidth to the memory looks like, and not theoretical. 

 

Did you guys notice that the Ram manufactures list the 1.6Gb/s per pin bandwidth?  Great, but how many pins are there per chip to transfer data. 

 

Im not going to lie, I dont know that we have made 100% sense of the memory bandwidth, but have definately raised enough contradictions to the 12.8GB/s claims from Anandtech, and I would like to know what they think about our findings.  They wont bother to look into it anymore, they got all the press and wouldnt want to go back now and find out that their findings were false.  What sucks is that no major websites bothered to do the research themselvs, and simply quoted Anandtechs article and didnt question it evena little bit, even though multiple developers comments contradict their claims. 

[3Dude]

It is hard to peice this information together though.  To say the ram chips are 16 bit isnt wrong, its just that there are 8 banks of 256MBx16bit ram inside each module.  So if the controller could only access one bank at a time, then yes it would be limited to 16bit, but since there are 8 chips, its theoretically eight times that that amount assuming each bank runs on its own channel.  Its also near impossibe to get real info from memory manufactures.  I dont care that NDA's are in place, its sad that sites like IGN dont have any contacts who are willing to divulge information anonymously.  Even if they dont actually know what the bandwidth is, they would at least know if it was better or worse than the 360.  If anything, game developers would have a better understanding of what the real world bandwidth to the memory looks like, and not theoretical. 
 
Did you guys notice that the Ram manufactures list the 1.6Gb/s per pin bandwidth?  Great, but how many pins are there per chip to transfer data. 
 
Im not going to lie, I dont know that we have made 100% sense of the memory bandwidth, but have definately raised enough contradictions to the 12.8GB/s claims from Anandtech, and I would like to know what they think about our findings.  They wont bother to look into it anymore, they got all the press and wouldnt want to go back now and find out that their findings were false.  What sucks is that no major websites bothered to do the research themselvs, and simply quoted Anandtechs article and didnt question it evena little bit, even though multiple developers comments contradict their claims. 

Actually we have the answer to that.

256.

Found it when i found out the 360 uses the same ram chip as the wii u's samsung ram.

Samsung k4j52324qc-bc14

macroware.wordpress.com/2006/01/24/whats-inside-the-microsoft-xbox-360/

though the 360 only uses half the pins.

We dont know the pins on the ram side, but we know the pins where they plug in. 158 pins on the ddr3 io

1.6 * 158=252.8/8=31.6

31.6 GB/s

Its looking pretty rock solid.

[Goodtwin]

http://www.samsung.c...c-dram/overview

 

This is what throws a wrench into our theory though.  Notice that they are saying that with the x16 organization, the max bandwidth for the chip is 4.2GB/s, matching up to Anandtech's claim.  They arent saying per bank, but per chip.  It also matches up with PC's and the memory they use.  It would seem strange for graphics cards to have 8 memory chips on the card when four higher density chips could be used.  They are matching up the organization to the memory bus.  If the memory bus is 256 bit, you wont see anything less than 8 memory chips on board.  Eight chips times the x32 organization gives us the 256bit bus.  

 

Keep in mind that the Xbox 360 uses 8 seperate chips while the WIi U only has 4.  

Edited by Goodtwin, 04 April 2013 - 10:46 AM.

[3Dude]

Goodtwin, on 04 Apr 2013 - 04:59, said:http://www.samsung.c...c-dram/overview
This is what throws a wrench into our theory though.  Notice that they are saying that with the x16 organization, the max bandwidth for the chip is 4.2GB/s, matching up to Anandtech's claim.  They arent saying per bank, but per chip.  It also matches up with PC's and the memory they use.  It would seem strange for graphics cards to have 8 memory chips on the card when four higher density chips could be used.  They are matching up the organization to the memory bus.  If the memory bus is 256 bit, you wont see anything less than 8 memory chips on board.  Eight chips times the x32 organization gives us the 256bit bus.  
Keep in mind that the Xbox 360 uses 8 seperate chips while the WIi U only has 4.  


Nope xbox has 4 like wii u




Were gravy dude.

Its not so much the number of chips, but the number of pins used. each module can have a max of 32bits out.

Typically you give someone a ram chip they treat it as one unit, despite the number of modules.

Nintendo appears to be 'cheating' the conventional system. I suspect inside that ram housing we will see more pins being used from multiple internal 'chips'.

Like the 360 though, according to my number, the wii u ALSO isnt using the maximum number of pins. But its using more.

We dont see where the bus begins at the pins. But we see where each one of those pins plug in.

The ddr3 i/o on the gpu!

its using 158 out of 256 pins.

Edited by 3Dude, 04 April 2013 - 11:22 AM.

[routerbad]

http://www.samsung.c...c-dram/overview

 

This is what throws a wrench into our theory though.  Notice that they are saying that with the x16 organization, the max bandwidth for the chip is 4.2GB/s, matching up to Anandtech's claim.  They arent saying per bank, but per chip.  It also matches up with PC's and the memory they use.  It would seem strange for graphics cards to have 8 memory chips on the card when four higher density chips could be used.  They are matching up the organization to the memory bus.  If the memory bus is 256 bit, you wont see anything less than 8 memory chips on board.  Eight chips times the x32 organization gives us the 256bit bus.  

 

Keep in mind that the Xbox 360 uses 8 seperate chips while the WIi U only has 4.  

Bit density in DDR3 should not effect bus width.

 

What we have are four modules, each is organized thusly, 256(rows)x16(columns)x8(banks).  This dictates how the memory is organized within the array itself, but the bus width per chip on a standard DDR3 interface is 32bit, or at least should be.

 

Didn't Hynix themselves confirm that each housing could support a 32 bit bus?

Goodtwin, on 04 Apr 2013 - 04:59, said:http://www.samsung.c...c-dram/overview
This is what throws a wrench into our theory though.  Notice that they are saying that with the x16 organization, the max bandwidth for the chip is 4.2GB/s, matching up to Anandtech's claim.  They arent saying per bank, but per chip.  It also matches up with PC's and the memory they use.  It would seem strange for graphics cards to have 8 memory chips on the card when four higher density chips could be used.  They are matching up the organization to the memory bus.  If the memory bus is 256 bit, you wont see anything less than 8 memory chips on board.  Eight chips times the x32 organization gives us the 256bit bus.  
Keep in mind that the Xbox 360 uses 8 seperate chips while the WIi U only has 4.  



Were gravy dude.

Right, 360 only had four chips as well.  I still think that using the pin counts inside the GPU are going to be the best measure of the bus width.

Actually we have the answer to that.

256.

Found it when i found out the 360 uses the same ram chip as the wii u's samsung ram.

Samsung k4j52324qc-bc14

macroware.wordpress.com/2006/01/24/whats-inside-the-microsoft-xbox-360/

though the 360 only uses half the pins.

We dont know the pins on the ram side, but we know the pins where they plug in. 158 pins on the ddr3 io

1.6 * 158=252.8/8=31.6

31.6 GB/s

Its looking pretty rock solid.

Yeah, that lines up way too perfectly.  1.6 per pin, 158 pins.  We're golden.

[3Dude]

It really makes sense that it seems so unusual. No one will EVER use ram modules like this... Unless they make there own custom hardware.

[Goodtwin]

Looks like your right, but the samsung ram is in a x32 organization instead of the x16 I am seeing for Wii U chips.  Did you see a teardown where that chip was used in the Wii U? 

Edited by Goodtwin, 04 April 2013 - 11:58 AM.

[3Dude]

Goodtwin, on 04 Apr 2013 - 06:12, said:Looks like your right, but the samsung ram is in a x32 organization instead of the x16 I am seeing for Wii U chips.  Did you see a teardown where that chip was used in the Wii U? 


Oh yeah. So far teardowns have found either hybix or samsung. Im pretty sure i posted a pic of tge samsung chip showing the serial number somewhere in this thread.

And the samsung chip being used is the exact same serial number, digit for digit an exact match to the samsung ram used in the 360. Which of course, using anandtech logic of ram chip=which bus, would automatically give the wii u the same bus as the 360. lol.


Ive been using this method for near everything i can find, and its working really well.

360:

128 pins * 1.4Gb/s (or the double pumped clock frequency, the samsung was 700x2) = 179.2gb/s /8 =22.4GB/s.

A direct hit.

I want to do the original wii, but i cant find its clock!!! Or a reliable bandwidth to check against.

Okay. Im guessing the ram in the wii is clocked somewhere in the 2-400mhz range.
IF:
~200MHz 1.9GB/s
~300MHz 2.9GB/s
~400MHz 3.9GB/s


This is fun.

Eh, ive found several hokey claims through google that the wii gddr3 bandwidth is around 4 GB/s. So im leaning towards it being clocked around 400.

oh right. Vegas and nappa, forgot about them. They were embedded ram with about 4GB bw. Probably where those numbers came from.Hokey internet claims rejected.

back to trying to remember. The stupid nomenclature doesnt help. All it brings up with the chip which is that its ranged from like, 200-900MHz....

Eh, ill just guess its 243MHz, like hollywood.

So ~2.4 GB/s for wii ddr3 bandwidth.


Why are so many guests reading this topic all of a sudden?

I would have thought being in a previously 'omg wii u bandwidth is half 360 bandwidth because ram serial numbers despite having the exact same serial number as 360 ram' thread would keep this out of the google attention radar.

Edited by 3Dude, 04 April 2013 - 03:01 PM.

[dragomix]

They are saying you are wrong on gaf, with no evidence why!? Strange world!

[routerbad]

Goodtwin, on 04 Apr 2013 - 06:12, said:Looks like your right, but the samsung ram is in a x32 organization instead of the x16 I am seeing for Wii U chips.  Did you see a teardown where that chip was used in the Wii U? 


Oh yeah. So far teardowns have found either hybix or samsung. Im pretty sure i posted a pic of tge samsung chip showing the serial number somewhere in this thread.

And the samsung chip being used is the exact same serial number, digit for digit an exact match to the samsung ram used in the 360. Which of course, using anandtech logic of ram chip=which bus, would automatically give the wii u the same bus as the 360. lol.


Ive been using this method for near everything i can find, and its working really well.

360:

128 pins * 1.4Gb/s (or the double pumped clock frequency, the samsung was 700x2) = 179.2gb/s /8 =22.4GB/s.

A direct hit.

I want to do the original wii, but i cant find its clock!!! Or a reliable bandwidth to check against.

Okay. Im guessing the ram in the wii is clocked somewhere in the 2-400mhz range.
IF:
~200MHz 1.9GB/s
~300MHz 2.9GB/s
~400MHz 3.9GB/s


This is fun.

Eh, ive found several hokey claims through google that the wii gddr3 bandwidth is around 4 GB/s. So im leaning towards it being clocked around 400.

oh right. Vegas and nappa, forgot about them. They were embedded ram with about 4GB bw. Probably where those numbers came from.Hokey internet claims rejected.

back to trying to remember. The stupid nomenclature doesnt help. All it brings up with the chip which is that its ranged from like, 200-900MHz....

Eh, ill just guess its 243MHz, like hollywood.

So ~2.4 GB/s for wii ddr3 bandwidth.


Why are so many guests reading this topic all of a sudden?

I would have thought being in a previously 'omg wii u bandwidth is half 360 bandwidth because ram serial numbers despite having the exact same serial number as 360 ram' thread would keep this out of the google attention radar.

You'd think it would.  Demystifying the bandwidth situation is not nearly as interesting to most people as bashing it.

They are saying you are wrong on gaf, with no evidence why!? Strange world!

They aren't reading the thread then or they are just dismissing out of hand.  I've been pouring over whitepapers for the last two days, but they are free to believe what they want.  In the end developers balk at the number Anandtech provided, and in some cases claim that they have numbers better than 360, but they can't go much beyond that in terms of information disclosure.  There are several ways to come to a number, and pretty much every way we've used with the numbers we know gives us a number beyond 12.8.

 

Also wanted to point out, the chips support bank interleaving and the memory controller should support array interleaving.  Meaning that even with an x16 width, multiple bits within the same chip can be accessed at the same time on different banks, and that addresses can be striped across the chips themselves by the memory controller.

Edited by routerbad, 04 April 2013 - 04:04 PM.

[3Dude]

dragomix, on 04 Apr 2013 - 09:45, said:They are saying you are wrong on gaf, with no evidence why!? Strange world!


Thats because they firmly believe. Not think, but wholeheartedly believe with a firm conviction that a ram chips serial/nomenclature can tell you how the chip is bussed. Because thats what some guy from anandtech said.

Nothing short of sheer force will make them think otherwise.

But unfortunately for them, as goodtwin can tell you, after talking directly with hynix, that is simply not the case. Each little 512megabit (not byte) module inside that big ram chip (there are 16 of them) can have up to a 32 bit bus, go out to the system, but how its arranged to create the hardwares rambus, has nothing to do with the ram manufacturer or the product they ship.

So Aanandtech is wrong.

Ironically, the very reason why they think the wii u is so weak in bandwidth, is the proof. The rams serial/id number.

While they got the hynix ram, nintendo actually uses several different chip id's with the same specifications. One of the samsung ones....

http://www.logictoyz...ddr3-sdram.html

samsung-k4j52324qc-bc14

Its the same 512 megabit chip used in the 360.

http://macroware.wor...osoft-xbox-360/

Now the particular one i linked too, is actually the gddr3 for the original wii (its a coincidence), and is only 1 512 megabit, 64MB chip.

There are 2 of them in each 360 ram chip on the mother board, and 4 of them in each ram chip of the wii u with the same id.

And YUP, 3 different systems of 3 different power capabilities use the same ram chip, with the same numbers on it, with very different busses.

But of course,we know none of that matters XD.




found a second samsung id in use.
K4W4G1646B

This one is hard to find a lot of info on.

says 256mb x16.

Numbers appear different from hynix and other samsung....

This is completely different from the specifications hynix sent us for the wii u ram.

wtf.....

shortage mislabel?

Anandtech is still wrong with 12.8GB/s But this would plant us firmly around 17 GB/s.

Hah, this chip would actually be a worse ram chip than whats in the wii's 64MB of ddr3.

http://www.samsung.c...c-dram/overview

This chip would be on the left row.

Now, the chip hynix uses would be in the middle. Its even affixed using the same ball grid array count.... along with being able to read and write being a supported feature... Lol wtf?


So... they take up the same space, but the voltage cost difference is 0.3 volts.... I dont think the insides of these particular samsung chips in the wii u match the outsides....



Either that or the wii has better gddr3 ram than wii u.

Goodtwin this is what you saw earlier right?

Edited by 3Dude, 05 April 2013 - 12:00 AM.

[Nollog]

http://thewiiu.com/t...wn/#entry135369

You saying I was right?

[3Dude]

Nollog, on 04 Apr 2013 - 12:41, said:http://thewiiu.com/t...#entry135369You saying I was right?


Unless this oddball samsung chip thats actually worse than the wii's ddr3, turns out to be the real ram chip. Yeah it looks like you were right.

Just too much stuff didnt add up and i had to look at it again.

Namely nfsmw-u.

...
......

That tear down updated? it has ANOTHER brand chip on their?

1.35 volts.... Thats not running with sstl 15.

wtf is going on.

Ah, it is vvdc 1.5 compatable

Edited by 3Dude, 04 April 2013 - 11:29 PM.